|Summary |Design Units |Sequential Statements |Concurrent Statements |Predefined Types |Declarations |

|Resolution and Signatures |Reserved Words |Operators |Predefined Attributes |Standard Packages |

VHDL Predefined Types from the package standard

The type and subtype names below are automatically defined.
They are not technically reserved words but save yourself a lot
of grief and do not re-define them.

Note that enumeration literals such as "true" and "false"
are not technically reserver words and can be easily overloaded,
but save future readers of your code the confusion.
It is confusing enough that '0' and '1' are enumeration
literals of both type Character and type Bit.
"01101001" is of type string, bit_vector, std_logic_vector and more.

There is no automatic type conversion in VHDL, yet users and libraries
may provide almost any type conversion. For numeric types
integer(X) yields the rounded value of the real variable X as an integer,
real(I) yields the value of the integer variable I as a real.

Predefined type declarations

Notes: Reserver words are in bold type,
Type names are alphabetical and begin with an initial uppercase letter.
Enumeration literals are in plain lower case.

type Bit is ('0', '1');

type Bit_vector is array (Natural range <>) of Bit;

type Boolean is (false, true);

type Character is ( --256 characters-- );

subtype Delay_length is Time range 0 fs to Time'high;

type File_open_kind is (read_mode, write_mode, append_mode);

type File_open_status is (open_ok, status_error, name_error, mode_error);

type Integer is range --usually typical integer-- ;

subtype Natural is Integer range 0 to Integer'high;

subtype Positive is Integer range 1 to Integer'high;

type Real is range --usually double precision floating point-- ;

type Severity_level is (note, warning, error, failure);

type String is array (Positive range <>) of Character;

type Time is range --implementation defined-- ;
     fs;            -- femtosecond
     ps  = 1000 fs; -- picosecond
     ns  = 1000 ps; -- nanosecond
     us  = 1000 ns; -- microsecond
     ms  = 1000 us; -- millisecond
     sec = 1000 ms; -- second
     min = 60  sec; -- minute
     hr  = 60  min; -- hour
  end units;

attribute Foreign : String ;

impure function Now return Delay_length;

The type classification of VHDL is shown below.
  Users can declare their own types and subtypes.
  A type statement is used to declare a new type.
  A subtype statement is used to constrain an existing type.

      |           |                |               +-natural
      |           |                |               +-positive
      |           |                |
      |           |                +-enumeration---+-boolean
      |           |                                +-bit
      |           |                                +-character
      |           |                                +-file_open_kind
      |           |                                +-file_open_status
      |           |                                +-severity_level
      |           |
      |           +-floating point-+-----------------real
      |           |
      |           +-physical-------+-----------------delay_length
      |                            +-----------------time
      |           |                |
      |           |                +-unconstrained-+-bit_vector
      |           |                                +-string
      |           |
      |           +-record-

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