CMSC 411: Computer Architecture

Fall 2013 / 3 credits

TuTh 2:30-3:45, ITE 233

Instructor: Dr. Marc Olano (
ITE 354 (455-3094); Office Hours: W 3:30-5:00, Th 1:00-2:15

TA: Chi Zhang (
ITE 340; Office Hours: Tu 10:00-11:00, We 9:30-10:30

Prequisite: C or better in CMSC 313 or CMPE 212 & CMPE 310

Text: David Patterson and John Hennessy, Computer Organization and Design, The Hardware/Software Interface, 4th Edition. Morgan Kaufmann, ISBN 978-0-12-374493-7


This course covers the design of complex computer systems making heavy use of the components and techniques discussed in CMSC 313, CMPE 212 and CMPE 310. All parts of the computer system - CPU, memory and input/output - are discussed in detail. Topics include information representation, floating-point arithmetic, instruction set design issues (RISC vs. CISC), microprogrammed control, hardwired control, pipelining, memory caches, bus control and timing, input/output mechanisms and issues in the construction of parallel processors

Course Outcomes

  1. In-depth understanding of the inner-workings of modern computers, their evolution, and trade-offs present at the hardware/software boundary
  2. Broad knowledge of the state of the art in computer architectures
  3. Familiarity with performance metrics and benchmarks
  4. General knowledge of advances in microelectronics and their implication on computer design
  5. Experience the design process in the context of a reasonable size hardware
  6. Exposure to design tools and validation setup


Grades will be based on homework (20%), a team project (25%), a midterm exam (25%) and a final exam (30%).

Homework is due by the begining of class on the date due. Late homework will not be accepted, and will receive a grade of 0.

Academic Honesty

By enrolling in this course, each student assumes the responsibilities of an active participant in UMBC's scholarly community in which everyone's academic work and behavior are held to the highest standards of honesty. Cheating, fabrication, plagiarism, and helping others to commit these acts are all forms of academic dishonesty, and they are wrong.

Specifically for this course, it is acceptable to use the text, instructor and TA. All written homework must be entirely solved and written by you. All programs must consist of either code given to you by the instructor or TA for the class, or code you personally wrote.


Date Topic Due
Aug 29 Introduction
Sep 3/5 Instruction Representation, Addressing  
Sep 10/12 Number Representation, Arithmetic  
Sep 17/19 Multiplication, Division, Floating Point HW1 (9/19)
Sep 24/26 Performance HW2 (9/26)
Oct 1/3 Datapath, Single-cycle Control Project (10/3)
Oct 8/10 Multi-cycle Control, Microprograms HW3 (10/10)

Oct 15/17

Review, Midterm Exam
Oct 22/24 Midterm discussion, Pipelining  
Oct 29/31 More Pipelining Project (10/31)
Nov 5/7 Memory & Cache HW4 (11/7)
Nov 12/14 More Cache, Virtual Memory HW5 (11/14)
Nov 19/21 More Virtual Memory, I/O  
Nov 26 Bus & I/O Interfaces, Thanksgiving Project (11/26)
Dec 3/5 GPU, Advanced Topic  
Dec 10 Project, Review Project (12/10)
Dec 19 Final Exam 1:00-3:00  

Online resources