############################################
#
# CMSC 202 Spring 2003
#
# Project 1 Makefile
#
# Note that lines which begin with # are comments
#
#   This "makefile" is read and interpreted by the unix
# "make" utility to automate compiling and linking
# files in large projects.  This file must be named
# "makefile" or "Makefile"
#
# The two simplest ways to use the "make" utility are
#    1. type   make <target>
# This causes the make utility to find your makefile
# and do whatever is necessary to create the target 
# you specified.
#
#    2. type   make
# This causes the make utility to find your makefile
# and build the first target found in the makefile
#
# When the appropriate target is located, make will
# build any of the targets dependencies if needed.
# make will continue in this recursive manner until
# all necessary targets are up-to-date
#
# D. L. Frey
#
#####################################################
#
# internal symbols are used so the makefile is easily
# changeable to be used for other projects.
#
# To define an internal symbol, set it "equal" to
# some string.  To used the symbol, enclose it in
# braces or parentheses and precede the left brace 
# (parenthesis) with a dollar sign
#
#####################################################

# define an internal symbol for the correct compiler
compiler = /usr/local/bin/g++

# define a symbol for the path to Mr. Frey's public directory
MrFreysDirectory = /afs/umbc.edu/users/d/e/dennis/pub/CMSC202/p1

# define an internal symbol for compiler switches to be used
# the -I switches tells the compiler where to look for .H files
# This is needed for project 1 so the compiler can find WordCount.H
compilerflags = -ansi -Wall -I . -I $(MrFreysDirectory)

# define an internal symbol for the name of the executable for the project
PROJECT=Proj1

# define an internal symbol for the list of .o files 
OBJECTS= proj1.o WordCount.o


# the next line defines $(PROJECT) as a target and tells the make
# utility which files $(PROJECT) depends on.  This is called the
# dependency line.  If any of the files in the dependency list
# are newer than $(PROJECT), then the make utility knows that 
# $(PROJECT) must be rebuilt.  If it's newer than all of the files on which
# it depends, then make will report that $(PROJECT) is up-to-date
#
# the second line below (which MUST START WITH A TAB) tells
# the make utility how to create $(PROJECT) (this is called the "rule")

$(PROJECT): $(OBJECTS)
	$(compiler) $(compilerflags) -o $(PROJECT) $(OBJECTS)

# define proj1.o as a target that is dependent on proj1.C
# and WordCount.H
proj1.o: proj1.C $(MrFreysDirectory)/WordCount.H
	${compiler} ${compilerflags} -c proj1.C

#define WordCount.o as a target
WordCount.o : $(MrFreysDirectory)/WordCount.C $(MrFreysDirectory)/WordCount.H
	$(compiler) $(compilerflags) -c $(MrFreysDirectory)/WordCount.C

###########################################################
# define some targets which help with directory maintenance

# 'make clean' removes all .o files, the project executable and core dump file
clean:
	touch foo.o
	rm -rf foo.o $(OBJECTS) $(PROJECT) core

# 'make cleanest' removes everything that 'make clean' removes
# plus backup files created by the editors
cleanest: clean
	rm -rf *~ *#